The present invention relates generally to data processing systems and, more particularly, to the use of storage devices, such as nonvolatile memory systems in data processing systems.
Recently, the number of devices using nonvolatile memories has increased. An MP3 player, a digital camera, a mobile phone, a camcorder, a flash card, and a solid state disk (SSD) are examples of devices that use nonvolatile memories as storage devices.
As more devices use nonvolatile memories as storage devices, the capacity of nonvolatile memories is generally increasing. One method for increasing memory capacity is use of a so-called multi level cell (MLC) method in which a plurality of bits is stored in one memory cell.
A two-bit MLC may be programmed to have any one of four states 11, 01, 10 and 00 according to distribution of a threshold voltage. This is illustrated, for example, in FIG. 1 where a two-bit MLC is programmed to have one of four states 11 (E), 01 (P1), 10 (P2), and 00 (P3). A nonvolatile memory, such as a flash memory may be programmed in units of a page. A memory controller may transfer data to a flash memory through a buffer memory. A page buffer in the flash memory temporarily stores the data loaded from the buffer memory and programs the loaded data into a selected page. After completing the programming operation, a program-verifying operation is carried out to determine whether the data have been correctly programmed.
As shown in FIG. 2, however, a NAND flash structure, for example, may include a column select line (CSL), which is ideally at a ground or reference voltage level when a read operation is performed. Typically, however, the CSL has parasitic resistance (e.g., R1) associated therewith. As a result, the read currents I[n−1], I[n], I[n+1], and I[n+2] can cause voltage drops due to this parasitic resistance. Such voltage drops may be called CSL noise.
FIG. 3 is a diagram that illustrates the effects of CSL noise on a two-bit MLC programmed in the P1 state. Ideally the CSL is at a ground or reference voltage level. Due to CSL noise, however, the cell state takes on a new, wider distribution, which can cause errors during a program-verify operation.